TSMC unveils its 6 nm process delivering 18% higher logic density over the N7 process

17 April 2019, 03:24:40

TSMC unveils its 6 nm process delivering 18% higher logic density over the N7 processTSMC has announced its 6-nanometer (N6) process, which builds upon the advantages of its N7 technology offering competitive performance-to-cost advantage and faster time-to-market with direct migration from N7-based designs. While being compatible with the N7, TSMC's N6 process delivers 18% higher logic density over the N7 process. It is scheduled for risk production in the first quarter of 2020. "TSMC N6 technology will further extend our leadership in delivering product benefits with higher performance and cost advantage beyond the current N7," said Dr. Kevin Zhang, TSMC Vice President of Business Development. "Building upon the broad success of our 7nm technology, we’re confident that our customers will be able to quickly extract even higher product value from the new offering by leveraging a well-established design ecosystem today."Source

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Specifications

Full specifications of various moblie devices grouped by brand and year of announcement

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